1. Field of the Invention
The present invention relates to a multiplex apparatus and a method for multiplexing a legacy device. More particularly, the present invention relates to a multiplex apparatus and a method for multiplexing a legacy device, in which a legacy device is multiplexed by using a pseudo legacy device.
2. Description of the Related Art
In recent years, computer system is commonly constructed using industrial standard technologies A multiplex system, which has been conventionally constructed with a special-purpose operating system and special-purpose hardware, also has been constructed with a general-purpose operating system and general-purpose hardware.
However, the general-purpose operating system has not always been designed in consideration of the multiplex system. As a consequence, there have been arisen several problems in constructing the multiplex system. In such problems, a method for multiplexing a legacy device has become particularly serious. An address of the legacy device is fixed on the precondition that there is only one address in the system. Therefore, if the operating system detects a trouble in the legacy device, the operating system may stop operations hereafter. Thus, the multiplex system needs to be configured such that even if a trouble occurs in the legacy device, such a trouble is transparent to the operating system.
There has been conventionally used a method for replacing a module of an operating system (hereinafter referred to as “an OS”), which accesses to the legacy device, with another module, so as to achieve the fail-over of the legacy device. In this method, the replaced module has trapped a request issued from the OS to the legacy device. In this way, even in the case that an improper response is returned from the legacy device, a processing can be continued without notifying the operating system of the response. However, this method has raised some problems, as described below.
A first problem is that since a vender of an OS normally does not allow a source code to be opened, the source code need to be offered from the vender of the OS in order to replace the module. Therefore, this method cannot be used for the system with the OS whose source code cannot be offered. That is to say, the OS, which can achieve the fail-over, is limited.
A second problem is that maintenance of the system hereafter is markedly degraded due to the replacement of the module in the OS. The vender of the OS, as needed, releases security patches with respect to a security hole found out after shipment. However, before applying the patches, it is necessary to consider an adverse effect from the patches to the replaced module. Therefore, it becomes difficult to apply the patches on a side of a user. In other words, the replacement of the module in the OS markedly degrades the maintenance of the system hereafter
In conjunction with the above description, Japanese Laid Open Patent Application (JP-A-Heisei, 11-232206) discloses an input/output control circuit. This input/output control circuit is interposed between a microprocessor and an input/output circuit, for controlling transmission of data between the microprocessor and the input/output circuit. Here, the microprocessor accesses to a memory which finishes an access operation at a predetermined access timing through a memory control line. The input/output circuit is featured by including (a) a memory interface and (b) an emulator. The memory interface is connected to the memory control line, so as to input an access request, which is outputted from the micro processor through the memory control line. The emulator outputs a response to the access request, which has been received from the memory interface, to the microprocessor at the same access timing as the above-described predetermined access timing.
Additionally, Japanese Laid Open Patent Application (JP-A-Heisei, 9-146853) discloses a duplicated calculator and a method for recovering from a trouble. The duplicated calculator includes duplicated processors (duplicated CPUs), duplicated input/output devices (duplicated I/Os), a duplicated system bus for connecting the duplicated CPU and the duplicated I/O to each other, and an I/O bus. The duplicated CPUs operate synchronously with each other. The duplicated I/Os operate synchronously with each other. In the case that a trouble occurs in the CPU or the I/O in one system, the CPU and the I/O in the other system continue an operable state. Then, the CPU and the I/O in the system, in which the trouble occurs, can be subjected to maintenance, replacement and re-assembly. The duplicated calculator further includes state storing means which stores its own state in each of the systems, and I/O bus connection selecting means which selects connection of the CPU in its own system to the I/O in its own system or the I/O in the other system. During the maintenance and replacement, only the connection of the CPU in its own system to the I/O in its own system is selected in each of the systems.